Back‘India must take leadership role in advance packaging of semiconductors’
They said ISRC must focus on advanced packaging of modular chiplet, as it is the future, and participate in global standards bodies to take a leadership role in the industry.
PremiumThe Centre must consider broadening the scope of the semiconductor policy to include modular chips or chiplet “advance packaging", said Nimish Modi, senior vice president of Cadence Design Systems and Jaswinder Ahuja, the India managing director. They said India Semiconductor Research Centre (ISRC) must focus on advanced packaging of modular chiplet, as it is the future, and participate in global standards bodies to take a leadership role in the industry. Edited excerpts from the interview:
What’s your assessment of India, particularly its semiconductor industry?
Modi: We have a presence in India for over 35 years, with a workforce across design centres in Noida, Bengaluru, Ahmedabad and Pune . One third of our staff of 11,000 is in India, including 30% of research and development team. We are engaged in collaborations, discussions with institutions such as ministry of electronics and information technology and the design-linked incentive programme. We see three key avenues for collaboration that align with India’s ambition to become a prominent global player in semiconductors. First is about cultivating a robust cloud-based ecosystem for design. Second and pivotal area is advanced packaging, more specifically what we refer to as 3D-IC and chiplet. Third is the support of generative AI technologies. India has huge opportunity to leverage it in enabling workforce.
How can India cement its position in advance packaging, when it’s only beginning to build a semiconductor ecosystem?
Modi: The trend within the overall ecosystem involves a shift from monolithic chips to modular chips, driven by the growing complexity and size of chips. This involves disaggregating System on Chip designs into discrete chips representing heterogenous functions and then integrating it together with advanced packaging. The movement to 3D-IC is fast gaining momentum but is still in relatively early days and presents a very strong opportunity for India to assume a leadership role in this industry transition, similar to skipping broad landline deployment to go directly to mobile phones. Cadence has strong collaborations with leading foundries like TSMC and Samsung to provide certified reference for its Integrity platform. By participating in global standards and becoming a 3D-IC and chiplet hub, India can carve out key role in this area.
What should the government be doing?
Modi: We’re advocating strategic activities and investments in cloud and advanced packaging. By proactively addressing these domains, India can position itself at the forefront of the technological innovation and leadership.
Should the government include advanced packaging in design-linked incentive (DLI) initiative?
Ahuja: Discussions are on at various levels of the government with both sides engaging constructively. To enable 3D- IC globally, there will be a lot of activity over five years . So, it’s all about what India does in a couple of years to carve out a unique role in this value chain, and must have an empowered technical committee to participate in the standards discussions going on globally. That’s our suggestion to the government. DLI policy framework is very broad and all-encompassing, now it should create a specific focus. ISRC must focus on advanced packaging as India has potential to create one of the most distinguished leadership products via advanced packaging, despite not having manufacturing capabilities at the most advanced process nodes initially.
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